Personal details

Sameh E.

Timezone: Dublin (UTC+1)

Summary

Sameh El-Ashry is working as senior digital verification engineer with 6+ years of industry experience. His work involves the verification of digital wireless communication IPs including PHYs, basebands, MACs, and verification of SerDes IPs. He has different published papers at international conferences for memory controllers, NoC, coverage, assertions, and UVM.
My favorite hoppy is teaching to students.

Technical skills

Top 3 skills

UVM・8 yrs SystemVerilog・8 yrs

Other skills

Verilog・8 yrs VHDL (VHSIC Hardware Description Language)・8 yrs FPGA・8 yrs C programming・4 yrs Python・3 yrs Tools・6 yrs

Work Experience

Senior Digital Verification Engineer

Si-Vision | Oct 2015 - Oct 2020

Python

Makefile

SystemVerilog

UVM

Coverage

Cdc

UPF

Uvm ral

Gls

Dft

Verification of digital wireless communication IPs including PHYs, basebands, MACs, and verification of SerDes IPs.

Verification Engineer

Mentor a Siemens business | Oct 2014 - Oct 2015

C++

SystemVerilog

UVM

Dpi

Verification of memory controllers.