Vincent T.

June ‘23 – Present: GeoSensors– Self Employed Contractor

• Field Programmable Gate Array (FPGA) Emulation Engineer with a Toronto based company.
• Working predominantly on FPGA RTL to replace their existing vendor constrained solution with a fully customised, parametrisable equivalent.

Key Achievements

• Defined the architecture, specification and implementation of a custom RTL DSP pipeline consisting of an analog front end, hardware efficient FIR Filters and data handlers with self clearing IRQs.
• Developed a hybrid SystemVerilog/UVM environment to test this pipeline in ModelSim.
• Created an FPGA environment allowing all parts of the compilation to be implemented to multiple targets thus eliminating the previous vendor specific constraints.
• Developed a design enablement environment along with various scripts generating RTL and testbench test patterns.

April ‘21 – June ‘23: Synopsys – Staff IC Design Engineer

• Digital IC design engineer with the PCIe IP Development team.
• Experience in the design of industry standard configurable IP, deliverable to multiple clients.
• Working predominantly on custom RTL design on the PCIe Transmitter.

Key Achievements

• Successfully completed the design of a front-end Application module allowing easy connectivity between a users application interface and the PCIe Transaction Layer.
• Worked extensively on the standardisation of various PCIe specification related types and functions for use across the PCIe stack with an emphasis on improved speed to market as well as design robustness.