Architected high-level compilation flows all the way from C++ to gates.

Principal Architect

Designed and implemented the MAC sub-system in a 10Mbps industrial Ethernet IC, which incorporates unique, integrated on-chip switch features. I'm responsible for the design of the block and it's subcomponents and their implementation in SystemVerilog, as well as their integration into the rest of the complex ASIC design.

Sr. Digital Design Engineer

Supported the development of a 5G baseband unit by implementing a JESD204B interface and coupling it with DACs and ADCs from Analog Devices to implement various link configurations. This was then coupled to the complete BBU design and tested and verified on an Intel Arria 10 board.

FPGA Design Consultant

I was responsible for developing a prototype hyperconverged acceleration card for storage application in data centers. I was responsible for deriving an architecture from a high-level set of requirements and then evolving that to a concrete design on a Xilinx Ultrascale+ FPGA SoC, as well as for the implementation of critical components of the Proof-of-Concept.
This design became part of a new entity, Sunlight IO, as part of which this work continued.

FPGA Architect

Responsible for a medium-sized team the developed all of the companies hardware. This is included the core business NEMA|gpu graphics processing units and NEMA|dc display controller IP, as well as development of any prototypes and demonstrators as required. Think Silicon IP is developed mostly for ASIC technologies (various nodes were used ranging from 40nm to 16nm) whereas Xilinx FPGA SoCs were used for prototyping.
I was responsible for taking a high-level product roadmap and refining it down to a concrete plan for the team, for the definition of concrete tasks based on the afore-mentioned plan and it's subsequent execution.

Group Leader - IC Design

I'm overseeing the development of the company's innovate Programmable Cloud Platform, a hardware/software device, which allows users to seamlessly integrate programmable logic devices like FPGAs into their cloud infrastructure by abstracting a significant portion of the overhead involved with utilizing FPGAs in compute applications.

Senior Research Engineer

Tackled a variety of topics including:
- Data center architectures and the role of FPGAs therein.
- Development of an FPGA-based memcached prototype in RTL and HLS (C/C++).
- Worked on implementation of a framework for accessing IBM CAPIs from Xilinx FPGAs.
- Next generation memory types performance evaluation for various application profiles.
- Identified key performance indicators and optimization potential for future implementations

Personal details

Kimon K.

Summary

Technical skills

Work Experience